Study of implementing the FEC on SoC FPGA for digital quench detector

doi:10.1007/s41605-018-0057-z

IHEP OpenIR > 加速器中心

	Study of implementing the FEC on SoC FPGA for digital quench detector
	Zhang JX(张景熙); Chen FS(陈福三); Cheng J(程建); Bian XJ(边晓娟); Zhang, Jing-Xi, Chen, Fu-San, Cheng, Jian; Bian, Xiao-Juan
	2018
发表期刊	RADIATION DETECTION TECHNOLOGY AND METHODS
ISSN	2509-9930
EISSN	2509-9949
卷号	2018 期号: 1 页码: 24
文章类型	Article
摘要	Generally, the front-end computer (FEC) in a digital quench detector always acts as a communication platform between front-end data acquisition system and upper monitoring computer. SoC FPGA is the optimal option for building system on chip. Aiming at developing a set of digital quench detectors with higher integration degree, lower cost and stronger portability that meets the needs of different kinds of superconducting magnets, it is essential to develop a universal FEC based on SoC FPGA.
DOI	10.1007/s41605-018-0057-z
收录类别	ADS
语种	英语
ADS Bibcode	2018RDTM....2...24Z
ADS URL	https://ui.adsabs.harvard.edu/abs/2018RDTM....2...24Z
ADS引文	https://ui.adsabs.harvard.edu/abs/2018RDTM....2...24Z/citations
引用统计	正在获取... 被引频次：0 [ADS]
文献类型	期刊论文
条目标识符	https://ir.ihep.ac.cn/handle/311005/286774
专题	加速器中心
通讯作者	Zhang JX(张景熙)
作者单位	中国科学院高能物理研究所
第一作者单位	中国科学院高能物理研究所
通讯作者单位	中国科学院高能物理研究所
推荐引用方式 GB/T 7714	Zhang JX,Chen FS,Cheng J,et al. Study of implementing the FEC on SoC FPGA for digital quench detector[J]. RADIATION DETECTION TECHNOLOGY AND METHODS,2018,2018( 1): 24.
APA	张景熙,陈福三,程建,边晓娟,Zhang, Jing-Xi, Chen, Fu-San, Cheng, Jian,&Bian, Xiao-Juan.(2018).Study of implementing the FEC on SoC FPGA for digital quench detector.RADIATION DETECTION TECHNOLOGY AND METHODS,2018( 1), 24.
MLA	张景熙,et al."Study of implementing the FEC on SoC FPGA for digital quench detector".RADIATION DETECTION TECHNOLOGY AND METHODS 2018. 1(2018): 24.