Three-dimensional observation for the integrated circuit is of potential interest to an improved understanding of the formation of embedded voids in the copper interconnects, which has become major reliability concern in achieving high-performance microprocessors. Nano-scale line width requires the imaging technique with a high spatial resolution as well as penetration through several microns of silicon to maintain the sample integrity. The resolution of Optical microscopy is not enough and the electron microscopy requires invasive sample cross-sectioning, not permitting the in situ identification. The utilization of non-destructive imaging using 3D x-ray microscopy offers the needed resolution and penetration ability without significant damage. In this paper, the ability to image tomographically voids in copper interconnects and the seven metallization layers are demonstrated with bright contrast and a sub-50nm resolution on 8keV BSRF X-ray microscope. The sample is specifically prepared for this initial experiment, with a diameter of similar to 10.3 mu m and a thickness of 15.7 mu m. In the future experiment we are attempting to image the sample in its original state with only the backside silicon substrate removed, realizing the more non-destructive observation.